John H. Lau

John H. Lau
Born1948 (age 77–78)
OccupationsEngineer and academic
Academic background
EducationB.S., Civil Engineering
M.S., Structural Mechanics
M.S., Engineering Physics
M.S., Management Science
Ph.D., Theoretical and Applied Mechanics
Alma materNational Taiwan University
University of British Columbia
University of Wisconsin
University of Illinois
Fairleigh Dickinson University

John H. Lau (Chinese: 劉漢誠; born 1948) is an engineer and academic. He is a senior special project assistant at the Unimicron Technology Corporation.

Lau's research interests have included advanced semiconductor packaging, flip chip, chiplet design, heterogeneous integration, co-packaged optics, glass packaging, hybrid bonding, fan-out wafer/panel-level packaging, and 2D, 2.1D, 2.3D, 2.5D, 3D, 3.3D, and 3.5D integrated circuit technologies. He is a fellow of the Institute of Electrical and Electronics Engineers (IEEE) and the American Society of Mechanical Engineers (ASME). He has received the Worcester Reed Warner Medal and the Avram Bar-Cohen Medal from ASME. he is also the recipient of IEEE's Rao Tummala Electronics Packaging Award and the Meritorious Achievement Award in Continuing Education.

Education

Lau was born in 1948 and raised in Macau.[1] He earned a B.S. in Civil Engineering from National Taiwan University in 1970. He received an M.S. in Structural Mechanics from the University of British Columbia in 1973 and an M.S. in Engineering Physics from the University of Wisconsin-Madison in 1974. Later, he completed his Ph.D. in Theoretical and Applied Mechanics from the University of Illinois in 1977. He obtained an M.S. in Management Science from Fairleigh Dickinson University in 1981.[2][3]

Career

Lau began his professional career as a research engineer at Exxon Production and Research Company between 1977 and 1978. He worked as a lead engineer at Ebasco from 1978 to 1980 and at Bechtel Power Corporation from 1981 to 1982. In 1984, he moved to Hewlett Packard Labs, where he was a senior MTS/individual contributor till 1995.[2] Subsequently, he founded Express Packaging Systems[4] and served as its president until 2000. He was employed as a senior interconnection specialist at Agilent Technologies from 2000 to 2006. He was a director of the System Packaging Lab at the Institute of Microelectronics between 2006 and 2009. In 2014, he became a senior technical advisor at ASM Pacific Technology,[2] where he worked for five years. He also worked as a specialist at the Industrial Technology Research Institute.[5] He was a chief technology officer at Unimicron Technology Corporation from 2019 to 2021 and has since then been a senior special project assistant there.[6]

Lau was the editor-in-chief of Circuit World from 1998 to 2000, and has been the general chair of the IEEE/EPS ECTC and IEMT. He was named a distinguished lecturer by ASME. He has also been a distinguished lecturer for IEEE/EPS since 1998.[3][2]

Research and work

Lau's research has focused on advanced electronic packaging, heterogeneous integration, and reliability engineering for high-performance semiconductor systems. He has studied areas including flip-chip technology,[7] three-dimensional integrated circuit (3D ICs),[8] system-in-package (SiP),[9] and structured reliability engineering framework.[10] He has also studied heterogeneous integration packaging[11] and wafer-level and panel-level packaging, focusing on mold-compound flow behavior, warpage control, and process-failure challenges.[12] Moreover, he has conducted research on thermal fatigue life prediction and solder joint reliability modeling.[13]

Lau's studies have examined thermal analysis and heat-transfer characteristics of TSV-based 3D integrated circuits,[14] the industrial readiness and commercial deployment of wafer-to-wafer hybrid bonding,[15] and co-packaged optics for high-bandwidth energy-efficient communication.[16] His work has also focused on heterogeneous integration (HI)[17] and fan-out packaging in relation to high-performance computing and artificial intelligence applications.[18]

Awards and honors

  • 2000 – Meritorious Achievement Award in Continuing Education, IEEE[4]
  • 2013 – Rao Tummala Electronics Packaging Award, IEEE[19]
  • 2015 – Worcester Reed Warner Medal, ASME[20]
  • 2024 – Avram Bar-Cohen Medal, ASME[21]
  • 2025 – C. P. Wong Global Electronic Packaging Award, International Conference on Electronic Packaging Technology[22]
  • 2025 – Lifetime Achievement Award Recipient, International Microelectronics Assembly and Packaging Society (IMAPS)[23]
  • Fellow – IMAPS[23]
  • Fellow – IEEE[24]
  • Fellow – ASME[25]

References

  1. ↑ 陳, 良榕 (23 September 2015). "替教科書寫序　郭台銘還真的懂半導體". CommonWealth Magazine (in Chinese). Retrieved 24 August 2026.
  2. 1 2 3 4 "Dr. John H. Lau". semiconchina. Retrieved May 25, 2026.
  3. 1 2 "John H. Lau Bio". Retrieved May 31, 2026.
  4. 1 2 "John H. Lau Receives IEEE EAB Meritorious Achievement Award in Continuing Education". IEEE. Retrieved June 11, 2026.
  5. ↑ "Co-Packaged Optics – 3D Heterogeneous Integration of Photonic IC and Electronic IC". IEEE vTools Events. Retrieved June 3, 2026.
  6. ↑ "Distinguished Lecture - Chiplet Design and Heterogeneous Integration Packaging". Hong Kong University of Science and Technology (HKUST). 17 January 2024. Retrieved May 31, 2026.
  7. ↑ Pecht, M.; Chang, H; Tsai, M (2009). "Warpage Analysis of Flip-Chip PBGA Packages Subject to Thermal Loading". IEEE Transactions on Device and Materials Reliability. 9 (3): 419. Bibcode:2009ITDMR...9..419T. doi:10.1109/TDMR.2009.2023847.
  8. ↑ Wang, Shuai; Feng, Jia-yun; Wang, Wei; Cao, Wen-chao; Ding, Xin; Wang, Shang; Tian, Yan-hong (2024). "Growth kinetics of interfacial intermetallic compounds formed in SnPbInBiSb high entropy alloy soldered joints on Cu substrates". Transactions of Nonferrous Metals Society of China. 34 (11): 3650. doi:10.1016/S1003-6326(24)66631-8.
  9. ↑ Topal, Emre; Gluch, Jürgen; Clausner, André; Cardoso, André; Zschech, Ehrenfried (2021). "Determination of the Filler Distribution in an Epoxy Molding Compound Using High-Resolution X-Ray Computed Tomography". IEEE Transactions on Components, Packaging and Manufacturing Technology. 11 (3): 504. Bibcode:2021ITCPM..11..504T. doi:10.1109/TCPMT.2020.3048672. ISSN 2156-3985.
  10. ↑ Ogunnowo, Enoch Oluwadunmininu; Adewoyin, Musa Adekunle; Fiemotongha, Joyce Efekpogua; Igunma, Thompson Odion; Adeleke, Adeniyi K. (2023). "A Conceptual Framework for Reliability-Centered Design of Mechanical Components Using FEA and DFMEA Integration". Journal of Frontiers in Multidisciplinary Research. 4 (1): 346. doi:10.54660/.JFMR.2023.4.1.342-361.
  11. ↑ Castillo, Stefanie (2026). "The DiQuNET Architecture for the Control of Quantum Processors: The Case Study of Trapped Ions". IEEE Access. 14: 42258. Bibcode:2026IEEEA..1442245C. doi:10.1109/ACCESS.2026.3665594.
  12. ↑ Ecoiffier, Diane; Vernhes, Pierre; Ooi, R.C.; Braun, Tanja; Dreissigacker, Marc; Fu, Haley (2020). "Experimental Study of Panel Level Packaging Warpage". 2020 IEEE 8th Electronics System-Integration Technology Conference (ESTC). p. 1. Bibcode:2020estc.conf..118E. doi:10.1109/ESTC48849.2020.9229746. ISBN 978-1-7281-6293-5.
  13. ↑ Su, Sinan; Akkara, Francy John; Thaper, Ravinder; Alkhazali, Atif; Hamasha, Mohammad; Hamasha, Sa'd (2019). "A State-of-the-Art Review of Fatigue Life Prediction Models for Solder Joint". Journal of Electronic Packaging. 141 (4): 040802-10. doi:10.1115/1.4043405.
  14. ↑ Guo, Fen; Suo, Zhao-Jun; Xi, Xin; Bi, Yu; Li, Tuo; Wang, Changhong; Su, Kang; Zou, Xiaofeng; Li, Rengang (2025). "Recent Developments in Thermal Management of 3D ICs: A Review". IEEE Access. 13: 94289. Bibcode:2025IEEEA..1394286G. doi:10.1109/ACCESS.2025.3569879.
  15. ↑ Alsukour, Mohammad; Valorge, Olivier; Faure, Margot; Vincent, Loïc; Milon, Victor; Chevalier, Pascal; Pistono, Emmanuel; Arnould, Jean-Daniel; Dubarry, Christophe (2024). "Die-to-Wafer Hybrid Bonding Impact at MM-Wave Frequencies". 2024 International 3D Systems Integration Conference (3DIC). p. 1. doi:10.1109/3DIC63395.2024.10830066. ISBN 979-8-3315-1650-5.
  16. ↑ Chen, Young-Kai (2025). "Editorial Interview: Recent Industrial Applications and Outlook of Optoelectronic Technologies for AI/ML Applications". IEEE Journal of Selected Topics in Quantum Electronics. 31 (3: AI/ML Integrated Opto-electronics): 2. Bibcode:2025IJSTQ..31S2652C. doi:10.1109/JSTQE.2025.3572652. ISSN 1558-4542.
  17. ↑ Manley, Madison; Victor, Ashita; Park, Hyunggyu; Kaul, Ankit; Kathaperumal, Mohanalingam; Bakir, Muhannad S. (2024). "Heterogeneous Integration Technologies for Artificial Intelligence Applications". IEEE Journal on Exploratory Solid-State Computational Devices and Circuits. 10: 89. Bibcode:2024IJESS..10...89M. doi:10.1109/JXCDC.2024.3484958.
  18. ↑ Kim, Nahyeon; Jung, Haksoon; Lee, Yongwoo; Eum, Sungmin; Han, Yechan; Park, Hyunjin; Park, Yunsik; Kwon, Jimin (2024). "Micro-3D-Printed Packaging Substrates with Embedded Through Holes for Organic Interposers". 2024 IEEE 74th Electronic Components and Technology Conference (ECTC). p. 710. Bibcode:2024ectc.conf..125K. doi:10.1109/ECTC51529.2024.00115. ISBN 979-8-3503-7598-5.
  19. ↑ "IEEE RAO R. TUMMALA ELECTRONICS PACKAGING AWARD RECIPIENTS" (PDF). IEEE Corporate Awards. Retrieved June 3, 2026.
  20. ↑ "Worcester Reed Warner Medal". The American Society of Mechanical Engineers. Retrieved May 24, 2026.
  21. ↑ "Avram Bar-Cohen Memorial Medal". The American Society of Mechanical Engineers. Retrieved May 24, 2026.
  22. ↑ "Recipient of 2025 CP Wong Global Electronic Packaging Award". International Conference on Electronic Packaging Technology. Retrieved May 31, 2026.
  23. 1 2 "IMAPS Award History". IMAPS. Retrieved May 31, 2026.
  24. ↑ "John H. Lau". IEEE Xplore. Retrieved May 24, 2026.
  25. ↑ "FELLOW" (PDF). American Society of Mechanical Engineers Events. Retrieved May 31, 2026.
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